DRV301 - Advanced Windows Driver Model (WDM) Drivers

Developers responsible for WDM bus drivers, bus filter drivers, and drivers for devices on backplane buses

This seminar begins where DRV201, Core WDM Device Drivers, ends. A driver for a device on a backplane bus is in many ways more complex than one for a protocol-based bus (such as USB, 1394, or SCSI). We will show you how to deal with device register programming, handle interrupts and DPCs, and implement DMA. This course covers all five common variations of DMA models, including bus master DMA, common-buffer DMA, packet-based DMA, and what we refer to as “stutter-mode” DMA. DMA controllers also differ in their implementation, so several methods of programming DMA controllers are presented, including the use of scatter-gather lists and chain tables.

We will also cover the details of the drivers known in Windows as bus drivers. A “bus” in the WDM plug-and-play model is any device that can have another device attached to it. If you need to support any such “parent” device, you must write a bus driver. In this seminar you’ll learn how. You’ll also learn how to write bus filter drivers, which can modify some of the functions of existing bus drivers.

The interaction of bus drivers with the plug and play manager is much more complex than that for functional drivers, so we will discuss the mechanics and internal operation of the plug-and-play manager in detail. We examine every plug-and-play IRP in terms of when and why it is sent to a driver, as well as the driver’s options on the processing the IRP. This is very important when writing high-performance or very complex drivers, because the student learns not only what to do, but also why.

Finally we will round out the seminar with a discussion of a variety of other driver coding techniques that can help provide efficient solutions to common problems.

DRV201: Core WDM Device Drivers, or prior direct experience writing WDM device drivers.

This seminar is only offered with hands-on labs. Students will write and debug a fully operational bus driver, a function filter driver, and a bus filter driver. The lab assignments are broken into a series of exercises that are interspersed with the lecture. Each lab exercise starts with the solution to the previous exercise, preventing the student from falling behind. The solutions to all lab exercises will be supplied in machine-readable form at the end of the course; these can be used as a foundation for development of actual driver projects.